On Line Testing for VLSI

On Line Testing for VLSI

This paper presents an overview of a comprehensive collection of on-line testing techniques for VLSI. Such techniques are for instance: self-checking design, allowing high quality concurrent checking by means of hardware cost ...

Author: Michael Nicolaidis

Publisher: Springer Science & Business Media

ISBN: 9781475760699

Category: Technology & Engineering

Page: 160

View: 529

Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Categories: Technology & Engineering

Advanced Simulation and Test Methodologies for VLSI Design

Advanced Simulation and Test Methodologies for VLSI Design

In testing VLSI circuits , the increase in circuit complexity is accompanied by an increase in the volume of test data in terms ... of testable functions , for example ROMs which have on - line error detection and self - testing PLAs .

Author: G. Russell

Publisher: Springer Science & Business Media

ISBN: 0747600015

Category: Computers

Page: 378

View: 980

Categories: Computers

A Designer s Guide to Built In Self Test

A Designer   s Guide to Built In Self Test

IEEE International Test Conf., 1992, pp. 506-513. D. Neebel and C. Kime, “Multiple Weighted Cellular Automata”, Proc. IEEE VLSI Test Symp., 1994, pp. 81-86. M. Nicolaidis, Y. Zorian and D. Pradhan, On-Line Testing for VLSI, ...

Author: Charles E. Stroud

Publisher: Springer Science & Business Media

ISBN: 9780306475047

Category: Technology & Engineering

Page: 320

View: 419

A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
Categories: Technology & Engineering

Test and Design for Testability in Mixed Signal Integrated Circuits

Test and Design for Testability in Mixed Signal Integrated Circuits

P.M. Van PeteChem and J.F. Duque, “Compact High-Frequency Output Buffer for Testing of Analog CMOS VLSI circuits”, IEEE Journal of Solid-State Circuits, Vol. 24, pp. ... "On-Line Error Detection for Continuous-Time MOSFET-C Filters".

Author: Jose Luis Huertas Díaz

Publisher: Springer Science & Business Media

ISBN: 9780387235219

Category: Technology & Engineering

Page: 298

View: 767

Test and Design-for-Testability in Mixed-Signal Integrated Circuits deals with test and design for test of analog and mixed-signal integrated circuits. Especially in System-on-Chip (SoC), where different technologies are intertwined (analog, digital, sensors, RF); test is becoming a true bottleneck of present and future IC projects. Linking design and test in these heterogeneous systems will have a tremendous impact in terms of test time, cost and proficiency. Although it is recognized as a key issue for developing complex ICs, there is still a lack of structured references presenting the major topics in this area. The aim of this book is to present basic concepts and new ideas in a manner understandable for both professionals and students. Since this is an active research field, a comprehensive state-of-the-art overview is very valuable, introducing the main problems as well as the ways of solution that seem promising, emphasizing their basis, strengths and weaknesses. In essence, several topics are presented in detail. First of all, techniques for the efficient use of DSP-based test and CAD test tools. Standardization is another topic considered in the book, with focus on the IEEE 1149.4. Also addressed in depth is the connecting design and test by means of using high-level (behavioural) description techniques, specific examples are given. Another issue is related to test techniques for well-defined classes of integrated blocks, like data converters and phase-locked-loops. Besides these specification-driven testing techniques, fault-driven approaches are described as they offer potential solutions which are more similar to digital test methods. Finally, in Design-for-Testability and Built-In-Self-Test, two other concepts that were taken from digital design, are introduced in an analog context and illustrated for the case of integrated filters. In summary, the purpose of this book is to provide a glimpse on recent research results in the area of testing mixed-signal integrated circuits, specifically in the topics mentioned above. Much of the work reported herein has been performed within cooperative European Research Projects, in which the authors of the different chapters have actively collaborated. It is a representative snapshot of the current state-of-the-art in this emergent field.
Categories: Technology & Engineering

Testing and Diagnosis of VLSI and ULSI

Testing and Diagnosis of VLSI and ULSI

The most frequent fault class is restricted to single lines in the network being stuck at 0 or 1. The complexity of finding a test set increases rapidly with the size of the network. Further, both the test set and the correct response ...

Author: F. Lombardi

Publisher: Springer Science & Business Media

ISBN: 9789400914179

Category: Technology & Engineering

Page: 544

View: 568

This volume contains a collection of papers presented at the NATO Advanced Study Institute on ·Testing and Diagnosis of VLSI and ULSI" held at Villa Olmo, Como (Italy) June 22 -July 3,1987. High Density technologies such as Very-Large Scale Integration (VLSI), Wafer Scale Integration (WSI) and the not-so-far promises of Ultra-Large Scale Integration (ULSI), have exasperated the problema associated with the testing and diagnosis of these devices and systema. Traditional techniques are fast becoming obsolete due to unique requirements such as limited controllability and observability, increasing execution complexity for test vector generation and high cost of fault simulation, to mention just a few. New approaches are imperative to achieve the highly sought goal of the • three months· turn around cycle time for a state-of-the-art computer chip. The importance of testing and diagnostic processes is of primary importance if costs must be kept at acceptable levels. The objective of this NATO-ASI was to present, analyze and discuss the various facets of testing and diagnosis with respect to both theory and practice. The contents of this volume reflect the diversity of approaches currently available to reduce test and diagnosis time. These approaches are described in a concise, yet clear way by renowned experts of the field. Their contributions are aimed at a wide readership: the uninitiated researcher will find the tutorial chapters very rewarding. The expert wiII be introduced to advanced techniques in a very comprehensive manner.
Categories: Technology & Engineering

Built In Test for VLSI

Built In Test for VLSI

Contents 1 1 Digital Testing and the Need for Testable Design 1.1 The Evolution of Test Technology , 2 1.2 Fault Models , 3 1.3 Structural and Functional Testing , 5 1.4 On - Line versus Off - Line Testing , 6 1.5 The Relationship ...

Author: Paul H. Bardell

Publisher: Wiley-Interscience

ISBN: UOM:39015012009919

Category: Technology & Engineering

Page: 354

View: 321

This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
Categories: Technology & Engineering

VLSI Design

VLSI Design

A fault - tolerant VLSI system is defined as one that can continue to provide its intended service even after certain PEs have failed . We have discussed techniques to test VLSI circuits in Chapter 9. In fabrication line testing ...

Author: M. Michael Vai

Publisher: CRC Press

ISBN: 0849318769

Category: Technology & Engineering

Page: 424

View: 900

Very Large Scale Integration (VLSI) has become a necessity rather than a specialization for electrical and computer engineers. This unique text provides Engineering and Computer Science students with a comprehensive study of the subject, covering VLSI from basic design techniques to working principles of physical design automation tools to leading edge application-specific array processors. Beginning with CMOS design, the author describes VLSI design from the viewpoint of a digital circuit engineer. He develops physical pictures for CMOS circuits and demonstrates the top-down design methodology using two design projects - a microprocessor and a field programmable gate array. The author then discusses VLSI testing and dedicates an entire chapter to the working principles, strengths, and weaknesses of ubiquitous physical design tools. Finally, he unveils the frontiers of VLSI. He emphasizes its use as a tool to develop innovative algorithms and architecture to solve previously intractable problems. VLSI Design answers not only the question of "what is VLSI," but also shows how to use VLSI. It provides graduate and upper level undergraduate students with a complete and congregated view of VLSI engineering.
Categories: Technology & Engineering

Proceedings International Test Conference 1997

Proceedings  International Test Conference 1997

As a matter of fact fault tolerant and failsafe system designs of yestarday have to be integrated on chip level , appealing for on - line testing techniques for VLSI . VLSI testing was dominated by the needs of achieving high quality ...

Author:

Publisher:

ISBN: UCSD:31822025564766

Category: Electronic digital computers

Page: 1054

View: 724

Categories: Electronic digital computers

Proceedings

Proceedings

One way of characterizing the difference between on-line and off-line testing is that no system function exists ... 73-92, 200l [4] M. Abramovici and C. Stroud, “BIST-Based Test and Diagnosis of FPGA Logic Blocks," IEEE Trans. on VLSI, ...

Author:

Publisher:

ISBN: UIUC:30112061450190

Category: Electronic circuit design

Page:

View: 429

Categories: Electronic circuit design

DCIS2002

DCIS2002

4- IEEE Standard 1149.1 Test Access Port and Boundary - Scan Architecture , IEEE Inc , NY , 1991 5 - R. Roy , “ Power ... 9 - M. Nicolaidis , Y. Zorian , D. K. Pradhan , editors , On - Line Testing for VLSI , Kluwer Academic Publishers ...

Author: Salvador Bracho del Pino

Publisher: Ed. Universidad de Cantabria

ISBN: 8481023116

Category: Technology & Engineering

Page: 735

View: 985

Este libro contiene las presentaciones de la XVII Conferencia de Diseño de Circuitos y Sistemas Integrados celebrado en el Palacio de la Magdalena, Santander, en noviembre de 2002. Esta Conferencia ha alcanzado un alto nivel de calidad, como consecuencia de su tradición y madurez, que lo convierte en uno de los acontecimientos más importantes para los circuitos de microelectrónica y la comunidad de diseño de sistemas en el sur de Europa. Desde su origen tiene una gran contribución de Universidades españolas, aunque hoy los autores participan desde catorce países
Categories: Technology & Engineering